1. Field of the Invention
The present invention relates to a track-and-hold circuit and an A/D converter using the same.
2. Description of Related Art
An analog/digital (A/D) converter typically includes a track-and-hold (T/H) circuit that samples an analog signal and holds its value for a certain period. The track-and-hold (T/H) circuit is also called sample-and-hold (S/H) circuit. In this specification, the term track-and-hold (T/H) circuit is used to include both of them.
Further, most T/H circuits include a preamp to amplify an analog signal that is input to a comparator, and a sampling circuit that includes a switched capacitor. For example, Japanese Unexamined Patent Application Publication No. 2006-115003 discloses a T/H circuit that includes a sampling circuit at the previous stage of the preamp.
Further, Published Japanese Translation of PCT International Publication for Patent Application, No. 10-509012 (U.S. Pat. No. 5,886,544) discloses, in FIGS. 2 and 4, the structure of amplifying one analog signal by N preamps and sampling the analog signals that are amplified by each of the preamps by separate sampling circuits. An article written by Venes, A. G. W. et al., titled “An 80-MHz, 80-mW, 8-b CMOS Folding A/D Converter with Distributed Track-and-Hold Preprocessing” (IEEE Journal of Solid-State Circuits, December 1996, Vol. 31, No. 12, pp. 1846-1853), which is the article written by the inventor of Published Japanese Translation of PCT International Publication for Patent Application, No. 10-509012, also discloses the similar technique.
FIG. 9 is a diagram schematically showing the circuit configuration of a T/H circuit shown in FIGS. 2 and 4 of Published Japanese Translation of PCT International Publication for Patent Application, No. 10-509012. Further, FIG. 10 shows an AC equivalent circuit in FIG. 9, and is a diagram to describe the problem solved by the present invention.
As shown in FIG. 9, the T/H circuit includes n (n is a natural number) pairs of preamps A and sampling circuits SC. An analog input signal Vin is input to n preamps A101, A102, . . . , A10n. The preamps A101, A102, . . . , A10n amplify the difference between the analog input signal Vin and each of reference voltages Vref1, Vref2, . . . , Vrefn. Each signal that is output from the preamps A101, A102, . . . , A10n is sampled by sampling circuits SC101, SC102, . . . , SC10n, respectively.
Now, description will be made on a pair of the preamp A101 and the sampling circuit SC101 as a representative example. The preamp A101 is a differential amplifier, and includes load resistors R1, R2 in each of two outputs. As shown in FIG. 9, the load resistors R1, R2 are operated as output resistors of the preamp A101. Each output of the preamp A101 is connected to a respective one of sampling capacitors C through a respective one of switches SW. The sampling circuit SC101 is formed by two pairs of switches SW and the sampling capacitors C. Other preamps and the sampling circuits have the similar structures, and therefore description will be omitted.
FIG. 10 is an AC equivalent circuit of FIG. 9. Description will now be made on the pair of the preamp A101 and the sampling circuit SC101 as a representative example. As shown in FIG. 10, an analog input signal Vin1 is input to this pair, and an analog output signal Vout1 is output. Now, Vin1=Vin−Vref1. A transfer function H(s)=Vout1/Vin1 can be expressed by the following equation (1) using transconductance gm, output impedance Rout based on the load resistors R1, R2, ON resistance Rsw of the switch SW, and capacitance Csamp of the sampling capacitor C.H(s)=−gm·Rout/{s·Csamp·(Rsw+Rout)+1}  (1)
A time constant τ of the output response can be expressed by the following equation (2) from the equation (1).τ=Csamp·(Rsw+Rout)  (2)
The equation (2) is established in any pair of the preamp A and the sampling circuit SC. However, as there are n pairs of the preamps A and the sampling circuits SC, variation Δτ of the time constant τ needs to be considered. When the variation of the ON resistance Rsw of the switch SW is indicated by ΔRsw, the variation of the output impedance Rout by ΔRout, the variation of the capacitance Csamp of the sampling capacitor C by ΔCsamp, the following equation (3) is established based on the equation (2).τ+Δτ=(Csamp+ΔCsamp)·(Rsw+Rout+ΔRsw+ΔRout)  (3)
The accuracy of the output voltage is degraded as the variation Δτ of the time constant is increased.